| ??? 07/02/03 17:13 Read: times |
#49880 - RE: Short Timing delays Responding to: ???'s previous message |
hi erik,
i read on a MPU oriented book that to AND two signals (perticularly when the o/p are active low) the bubbled input gate convention is used. for example if you want to AND the ~X and ~Y and want an output that is also active low. folowing has to done 1. invert the ~X ,~Y 2. AND the result (i.e. X,Y) 3. invert the output again first two steps form a NOR gate(or input bubbled AND)and thrird step will cancels the bubble at output and it becomes and simle OR operation. in other word inactivate the output if either input is inactive. abhishek |



