Lets start life with Vdd= 0. When Vdd RAMPS from 0 to 0.2V a power-on detect (POD) circuit goes active and holds the part in reset(POR). When should it let go of reset? As Vdd continues to ramp, eventually the brownout detect(BOD)circuits work. When the BOD is active it takes over from the POD and BOD controls reset. Once Vdd is above the BOD threshold, an internal reset is released and the part executes code. When Vdd falls below the BOD threshold the BOD circuits will hold the part in reset(assuming BOD reset is enabled). They will continue to hold the part in reset until Vdd falls so low that the BOD circuits don't work. (For illustration lets say this is when Vdd = 0.5V - I'm not saying this is the actual voltage point - I'd have to go ask). At this point reset will not be active and the MCU will try to execute code. Its possible that the instructions are improperly executed since Vdd is low. If this MCU has IAP code, the MCU might end up trying to execute IAP code such as an erase or program operation. At this point the errant execution is not an issue because Vdd is too low for IAP programming to physically occur. If Vdd continues and falls to zero, there is no problem. But, if Vdd should shoot back up into the normal operation range without first falling below the POD threshold of 0.2V, you can have a device that is an unknown machine state because it was way outside the operating voltage range and did not get a valid reset. This can cause an unintended erase/program operation on a part with IAP.
For those using ICP, the reset pin is only "open" for accepting the enter-ICP command following a POD. a Manual reset won't do it. It has to be a power cycle. Feel free to ask .