All I say is that anything outside the SFR area is a Pandoras box.

And so would have the option of use the extended sp and Ri. Still rather trivial (a single bit somewhere in SFR... What about AUXR?).
making the "extended registers" SFR bit dependent would make total havoc with the silicon. "Extended Ri" to access DATA/IDATA would have to be 8 bit OR run in the "separate stack memory" OR be XDATA access and how would you choose?
AUXR has NOTHING to do with processor architechture, it is a memory selector.

not to mention what happens to mov r1,sp - mov a,@r1?
Again, nothing special, you load both sp/sph into r1/r1h and @r1 points accordingly.
But WHAT should it point to XDATA/"stack memory"/"extended? (I)DATA" ???

Going by your idea
if mov @R1 follows mov Ri,SP the move should be from "stack memory" and if it does not it should be from XDATA or "extended IDATA". So "follows" imply that you need to disable interrupts around these 2 instructions or do you have some other idea. Again "Pandoras box". Of course making the "extended stack pointer" go for an XDATA stack would "only" require a total rethink of the programm and make every PUSH and POP run at XDATA speed which in most cases is slower than IDATA speed.

A simple example, '51 could be finally gcc-able...
if that's the goal then you are saying that the hardware should be developed to match the software, not the other way around, tell that to Philips and Keil.

Erik