- mov Ri,ARj is a 16-to-16 bit transfer (as long as i,j={0,1}) so the upper byte is moved implicitly
- all upper bytes can have dedicated SFR positions plus the "shared" RiH; call them say ARiHb for high Ri bank b.

The problem is: where ate you going to 'bank' the MSB registers?

The idea of having R2,3 as high bytes for R0,1 occured to me, too, as these couples are often used as pseudo-16-bit registers and moved to and from dptr. I rejected this idea because:
1) - this means a bigger deal of incompatibility
2) - reduces the number of general-purpose registers (accessed in fast instructions) to 4 per bank.
1) false, 2) true

a) C stands for Complicated, I suspect, 2) but what doeas the 2nd I mean?
a) correct, b) the last s in KISS stand for "stupid", have a guess

Erik