??? 01/16/07 04:04 Read: times |
#130841 - I need some help with an 8051 design |
Until now, My method of creating an 8051 system is to create the main computer unit (where the ROM acts as the primary data server, which functions the same as a computer's bios chip.), and create a programming unit.
The programming unit simply takes data from the parallel port of the PC and writes it to the ROM. So For me to program the ROM, I have to use the programming unit first (insert rom, write to it, and then remove it), then after, I have to insert the rom into the main computer unit. This is a pain, especially when the rom is not properly written. Another disadvantage is that because I am using counters to obtain the correct address, I have to adapt both circuits so that the data can be properly addressed. now, that aside, I want to try to merge these two circuits into one major system, where I can program the ROM, run the ROM, and the onboard accessories (that I change from time-to-time), and do everything without removing the ROM. I thought of one design where I use a 74HC245 buffer to allow or deny writes, but I need to figure out how I can use the one crystal to control everything including the write speed. ROM writing is slower than ROM reading. I also want the parallel port to control when the system resets, and when the address is incremented. Most 8051 SBC designs involve a crystal connected to the XTAL pins. To me, this means that the 8051 runs endlessly. Somehow, I need to be able to control whether this crystal runs or not. Please help. Thanks. |