Craig, et al;

There are any number of ways to implement co-processor connections and I2C is as valid as the next. Its suitability depends upon how you envision the co-processor-central processor relationship (direct programming or logic programming).

As a '51 device performs as the central processor;

1)  Does the '51 retain it's Harvard Architecture?

2)  Will i/o interconnect within the Data MAP or connect to processor pin's?

3)  Will "mass store" (IDE or otherwise) be intimate or a co-processor?

3a)  If "mass store" is not intimate is it a "channel" interface requiring central processor intervention for data to propagate to memory or does it "DMA".

4)  If video is not intimate to the central processor, (which seems to be the prevalent opinion) is it a channel device or does it share the Data Memory map?

5)  How much of the "OS" exist's prior to boot load from "mass storage".

regards,
p