Very nice, but where's the memory? How do we access it?

It would be very nice if each chip could access it (and i.e. use video chip to blit areas of it, audio chip to play samples directly from memory, IO chip to read or write in DMA mode etc, but I don't quite see how to synchronize them - either a multiport chip with 2 output and 2 Input/output lines, or access only every n cycles. Eventually with /12 derivatives we could use a very unreliable technique and difficult to implement technique of clocking all processors with a shift of 4 cycles each, so the memory would be accessed 4 times during each cycle.