Hi All.

The previous decoder was:

And this is what I was looking for:
A better decoder. Better means less chip count, less propagation delay and less susceptibility to glitches.

Chip count:
Previous decoder:
10(2 big HC154s and 8 small HC02s for the bunch of NORs)
New decoder:
4(4 small HC238s)
(Assuming that the extra NOT gates are made using other spare HC00s in the board)
Propagation Delay:
Previous decoder:
7ns(for 28F512_CS NOT) + 11ns(for HC154) + 7ns(for NOR) adds up to 35ns
New baby:
7ns(for 28F512_CS NAND WR) + 14ns(for HC238) adds up to 21ns
Glitch susceptibility:
Taking into consideration the different level of complexity in the internal circuitry of HC154 especially when combined with the bunch of NOR gates after it in comparison to that of HC238, yields to -at least a feeling- that the new one is less glitch-prone.
Still CPLD is a nice and classy solution, despite it's 255 page horrifying beginner's mannual AND your comments are priceless.

Best.