The usual argument against connecting CPLD or FPGA pins to a connector (the "real world") is to prevent damaging an expensive chip in even of shorts or lightning strikes or whatever. The thinking is that if something happened, you can easily replace that '245 buffer.

Here's a Real World perspective. The expense involve when ANY chip that fails in the field and requires a warranty return is a lot greater than the cost of the failed chip. You can't expect the customer to swap out ANY chip -- "No User-Serviceable Parts Inside."

Plus, there are a lot of instances where you can't afford the extra delay incurred by an external buffer. PCI is a good example.

The New Thing is to use high-speed differential serial links (LVDS or whatever) and all of the new FPGA families support these links and there's no way to glue on an external buffer. Besides, the newest chips have good input clamps and such and decent output drive (24 mA, as you say) has been available for several generations.

It all really depends on the application. I mean, if you need 64 mA output drive, you need an external driver.

-a